PIC18F2610-E/SO【PDF 208/234 页】IC MCU FLASH 32KX16 28SOIC

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2009 Microchip Technology Inc.

DS39636D-page 77

PIC18F2X1X/4X1X

6.0

FLASH PROGRAM MEMORY

In PIC18F2X1X/4X1X devices, the program memory is

implemented as read-only Flash memory. It is readable

over the entire VDD range during normal operation. A

read from program memory is executed on one byte at

a time.

6.1

Table Reads

For PIC18 devices, there are two operations that allow

the processor to move bytes between the program

memory space and the data RAM: table read (TBLRD)

and table write (TBLWT).

Table read operations retrieve data from program

memory and place it into the data RAM space.

Figure 6-1 shows the operation of a table read with

program memory and data RAM.

The program memory space is 16 bits wide, while the

data RAM space is 8 bits wide. Table reads and table

writes move data between these two memory spaces

through an 8-bit register, TABLAT.

Table reads work with byte entities. A table block

containing data, rather than program instructions, is not

required to be word-aligned. Therefore, a table block can

start and end at any byte address.

Because the program memory cannot be written to or

erased under normal operation, the TBLWT operation is

not discussed here.

FIGURE 6-1:

TABLE READ OPERATION

Note 1: Although

cannot

used

PIC18F2X1X/4X1X devices in normal

operation, the TBLWT instruction is still

implemented in the instruction set.

Executing the instruction takes two

instruction cycles, but effectively results

in a NOP.

2: The TBLWT instruction is available only in

programming modes and is used during

In-Circuit Serial Programming (ICSP).

Table Pointer(1)

Table Latch (8-bit)

Program Memory

TBLPTRH

TBLPTRL

TABLAT

TBLPTRU

Instruction: TBLRD*

Note 1: Table Pointer register points to a byte in program memory.

Program Memory

(TBLPTR)

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